Bayle Shanks's website: proj-plbook-plCh68kIsa

Table of Contents for Programming Languages: a survey

Motorola 68000

Both https://www.semipublic.comp-arch.net/wiki/RISC_versus_CISC and http://www.cpushack.com/CPU/cpu4.html call the Motorola 68000 'elegant' so maybe we should take a look at it.

Also it's listed on http://alanclements.org/processors.html . It has an unofficial Debian port but not an official one (it used to have an official Debian port, though).

My purpose in including this section is NOT to teach the reader the basics of assembly language and computer architecture; i assume that the reader already knows that. I just want to give you more food for thought about 'minimal' programming languages.

" The CISCs that failed - DEC VAX and the Motorola 68000 - were the most CISCy.

    Most instructions were variable length.
    Some frequently used instructions could be very long.
    Many instructions had microcode.
    Many operations had side effects.
    They had complicated addressing modes - elegant in their generality, but complicated, sometimes necessitating microcode just to calculate an address. " -- https://www.semipublic.comp-arch.net/wiki/RISC_versus_CISC

Said to be very regular [1], and much liked [2].

Links:

A descendent is the ColdFire? processor, which is a simplified 68000

todo

instructions mentioned on http://alanclements.org/68k.html:

arith: ADD, SUB, AND, OR, MULU, other: MOVE, STOP, shifts: LSL, LSR, ASL, ASR, ROL, ROR, ROXL, ROXR bit ops: BTST, BSET, BCLR, BCHG (BCHG a b means flip bit a within b)

instructions mentioned on http://alanclements.org/mipstoarm.html :

la/lw/ADR/LDR (LOAD), sw, STR (store), addu/ADD, subu/SUB, MUL, ADDIU, MOV, ori, AND

ColdFire (simplified 68000)

" ColdFire?, Motorola’s attempt to simplify and “RISC-ify” the venerable 68K architecture. Stripping down the 68K instruction set to just its essentials succeeded in reducing ColdFire’s? complexity, slashing its power consumption and dropping its cost, but it also proved that “partially software compatible” makes about as much sense as “partially pregnant.” -- [3]

Note that Coldfire is dead; afaik no new Coldfire parts have been introduced since 2010 [4].

16 general-purpose 32-bit registers (D0–D7 (Data Registers), A0–A7 (Address Registers))
32-bit program counter (PC)
8-bit condition code register (CCR)

floating point unit also has:

8 64-bit floating-point data registers (FP0–FP7)
32-bit floating-point control register (FPCR)
32-bit floating-point status register (FPSR)
32-bit floating-point instruction address register (FPIAR)

MAC (multiply accumulate) unit also has:

32-bit MAC status register (MACSR)
32-bit accumulator register (ACC)
32-bit MAC mask register (MASK)

Addressing modes:

register direct
indirect
indirect with postincrement
indirect with predecrement
indirect plus immediate offset
indirect plus immediate offset plus scaled index (e.g. you specify an index register and a scale factor)
todo

todo

instruction encoding:

variable-width instructions that can either be 16, 32, or 48 bits
might use all available bits for a variable width opcode; eg if only one register is needed and the instruction is 16 bits then the instruction encoding might define values for 13 bits and leave 3 bits to specify the register. The msb 4 bits are always opcode bits however.
8 data registers and 8 address registers so only needs a 3-bit register specifier in most cases (4 bits where either type of register can be used)

According to https://microapl.com/Porting/ColdFire/cf_68k_diffs.html , addr modes are:

" Fully supported: Data Register Direct Address Register Direct Address Register Indirect Post-increment Pre-decrement Displacement (16-bit displacement) PC Displacement (16-bit displacement) Absolute Short Absolute Long Immediate

Partially supported: Indexed PC Indexed The restrictions on these two modes are: The displacement constant is 8-bit only; "Zero-suppressed" registers are not supported; The Index register can only be handled as a Long. Word-length index registers are not supported. The scale factor must be 1, 2, or 4. Scale factors of 8 are not supported "

Links:

The 6800

https://en.wikipedia.org/wiki/Motorola_6800

6800 descendents

Besides 68000 and ColdFire?, there are some Freescale 8-bit and 16-bit MCUs, such as the HC08, HCS08, HCS12, HC16, RS08. Dunno if there is a simple name for all of those. Maybe MC6800? According to http://www.freescale.com/files/training_pdf/27617_HCS08_CPU_WBT.pdf , these are generally descended from the 6805.

Links:

Also, the 6502 was partially inspired by the 6800:

"The MOS Technology 650X family represents a conscious attempt of eight former Motorola employees who worked on the development of the 6800 system to put out a part that would replace and outperform the 6800, yet undersell it. With the benefit of hindsight gained on the 6800 project, the MOS Technology team ..." [5]