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proj-plbook-plChX86Isa

Table of Contents for Programming Languages: a survey

x86

we won't go into much detail..

Addressing modes ( http://cs.nyu.edu/courses/fall10/V22.0201-002/addressing_modes.pdf ):

http://www.agner.org/optimize/blog/read.php?i=25 claims "The total number of x86 instructions is well above one thousand"

https://www.nayuki.io/page/a-fundamental-introduction-to-x86-assembly-programming

http://savannah.nongnu.org/projects/pgubook/

https://en.wikipedia.org/wiki/X86_instruction_listings

http://zsmith.co/intel.html

    AAA - Ascii Adjust for Addition
    AAD - Ascii Adjust for Division
    AAM - Ascii Adjust for Multiplication
    AAS - Ascii Adjust for Subtraction
    ADC - Add With Carry
    ADD - Arithmetic Addition
    AND - Logical And
    ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)
    BOUND - Array Index Bound Check (80188+)
    BSF - Bit Scan Forward (386+)
    BSR - Bit Scan Reverse (386+)
    BSWAP - Byte Swap (486+)
    BT - Bit Test (386+)
    BTC - Bit Test with Compliment (386+)
    BTR - Bit Test with Reset (386+)
    BTS - Bit Test and Set (386+)
    CALL - Procedure Call
    CBW - Convert Byte to Word
    CDQ - Convert Double to Quad (386+)
    CLC - Clear Carry
    CLD - Clear Direction Flag
    CLI - Clear Interrupt Flag (disable)
    CLTS - Clear Task Switched Flag (286+ privileged)
    CMC - Complement Carry Flag
    CMP - Compare
    CMPS - Compare String (Byte, Word or Doubleword)
    CMPXCHG - Compare and Exchange
    CWD - Convert Word to Doubleword
    CWDE - Convert Word to Extended Doubleword (386+)
    DAA - Decimal Adjust for Addition
    DAS - Decimal Adjust for Subtraction
    DEC - Decrement
    DIV - Divide
    ENTER - Make Stack Frame (80188+)
    ESC - Escape
    HALT - Halt
    F2XM1 - Compute 2x-1
    FABS - Absolute value
    FADD - Floating point add
    FADDP - Floating point add and pop
    FBLD - Load BCD
    FBSTP - Store BCD and pop
    FCHS - Change sign
    FCLEX - Clear exceptions
    FNCLEX - Clear exceptions / no wait
    FCOM - Floating point compare
    FCOMP - Floating point compare and pop
    FCOMPP - Floating point compare and pop twice
    FCOS - Floating point cosine (387+)
    FDECSTP - Decrement floating point stack pointer
    FDISI - Disable interrupts (8087 only; others do fnop)
    FNDISI - Disable interrupts no wait (8087 only; others do fnop)
    FDIV - Floating divide
    FDIVP - Floating divide and pop
    FDIVR - Floating divide reversed
    FDIVRP - Floating divide reversed and pop
    FENI - Enable interrupts (8087 only; others do fnop)
    FNENI - Enable interrupts nowait (8087 only; others do fnop)
    FFREE - Free register
    FIADD - Integer add
    FICOM - Integer compare
    FICOMP - Integer compare and pop
    FIDIV - Integer divide
    FIDIVR - Integer divide reversed
    FILD - Load integer
    FIMUL - Integer multiply
    FINCSTP - Increment floating point stack pointer
    FINIT - Initialize floating point processor
    FNINIT - Initialize floating point processor no wait
    FIST - Store integer
    FISTP - Store integer and pop
    FISUB - Integer subtract
    FISUBR - Integer subtract reversed
    FLD - Floating point load
    FLDZ - Load constant onto stack: 0.0
    FLD1 - Load constant onto stack: 1.0
    FLDL2E - Load constant onto stack: logarithm base 2 (e)
    FLDL2T - Load constant onto stack: logarithm base 2 (10)
    FLDLG2 - Load constant onto stack: logarithm base 10 (2)
    FLDLN2 - Load constant onto stack: natural logarithm (2)
    FLDPI - Load constant onto stack: pi (3.14159...)
    FLDCW - Load control word
    FLDENV - Load environment state
    FMUL - Floating point multiply
    FMULP - Floating point multiply and pop
    FNOP - no operation
    FPATAN - Partial arctangent
    FPREM - Partial remainder
    FPREM1 - Partial remainder (IEEE compatible, 387+)
    FPTAN - Partial tangent
    FRNDINT - Round to integer
    FRSTOR - Restore saved state
    FSAVE - Save FPU state
    FSAVEW - Save FPU state / 16-bit format (387+)
    FSAVED - Save FPU state / 32-bit format (387+)
    FNSAVE - Save FPU state no wait
    FNSAVEW - Save FPU state no wait / 16-bit format (387+)
    FNSAVED - Save FPU state no wait / 32-bit format (387+)
    FSCALE - Scale by factor of 2
    FSETPM - Set protected mode (287 only; 387+ = fnop)
    FSIN - Sine (387+)
    FSINCOS - Sine and cosine (387+)
    FSQRT - Square root
    FST - Floating point store
    FSTP - Floating point store and pop
    FSTCW - Store control word
    FNSTCW - Store control word no wait
    FSTENV - Store FPU environment
    FSTENVW - Store FPU environment / 16-bit format (387+)
    FSTENVD - Store FPU environment / 32-bit format (387+)
    FNSTENV - Store FPU environment no wait
    FNSTENVW - Store FPU environment no wait / 16-bit format (387+)
    FNSTENVD - Store FPU environment no wait / 32-bit format (387+)
    FSTSW - Store status word
    FNSTSW - Store status word no wait
    FSUB - Floating point subtract
    FSUBP - Floating point subtract and pop
    FSUBR - Floating point reverse subtract
    FSUBRP - Floating point reverse subtract and pop
    FTST - Floating point test for zero
    FUCOM - Unordered floating point compare (387+)
    FUCOMP - Unordered floating point compare and pop (387+)
    FUCOMPP - Unordered floating point compare and pop twice (387+)
    FWAIT - Wait while FPU is executing
    FXAM - Examine condition flags
    FXCH - Exchange floating point registers
    FXTRACT - Extract exponent and significand
    FYL2X - Compute Y * log2(x)
    FYL2XP1 - Compute Y * log2(x+1)
    HLT - Halt CPU
    IDIV - Signed Integer Division
    IMUL - Signed Multiply
    IN - Input Byte or Word From Port
    INC - Increment
    INS - Input String from Port (80188+)
    INT - Interrupt
    INTO - Interrupt on Overflow
    INVD - Invalidate Cache (486+)
    INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)
    IRET/IRETD - Interrupt Return
    Jxx - Jump Instructions Table
    JCXZ/JECXZ - Jump if Register (E)CX is Zero
    JMP - Unconditional Jump
    LAHF - Load Register AH From Flags
    LAR - Load Access Rights (286+ protected)
    LDS - Load Pointer Using DS
    LEA - Load Effective Address
    LEAVE - Restore Stack for Procedure Exit (80188+)
    LES - Load Pointer Using ES
    LFS - Load Pointer Using FS (386+)
    LGDT - Load Global Descriptor Table (286+ privileged)
    LIDT - Load Interrupt Descriptor Table (286+ privileged)
    LGS - Load Pointer Using GS (386+)
    LLDT - Load Local Descriptor Table (286+ privileged)
    LMSW - Load Machine Status Word (286+ privileged)
    LOCK - Lock Bus
    LODS - Load String (Byte, Word or Double)
    LOOP - Decrement CX and Loop if CX Not Zero
    LOOPE/LOOPZ - Loop While Equal / Loop While Zero
    LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not Equal
    LSL - Load Segment Limit (286+ protected)
    LSS - Load Pointer Using SS (386+)
    LTR - Load Task Register (286+ privileged)
    MOV - Move Byte or Word
    MOVS - Move String (Byte or Word)
    MOVSX - Move with Sign Extend (386+)
    MOVZX - Move with Zero Extend (386+)
    MUL - Unsigned Multiply
    NEG - Twos Complement Negation
    NOP - No Operation (90h)
    NOT - Ones Compliment Negation (Logical NOT)
    OR - Inclusive Logical OR
    OUT - Output Data to Port
    OUTS - Output String to Port (80188+)
    POP - Pop Word off Stack
    POPA/POPAD - Pop All Registers onto Stack (80188+)
    POPF/POPFD - Pop Flags off Stack
    PUSH - Push Word onto Stack
    PUSHA/PUSHAD - Push All Registers onto Stack (80188+)
    PUSHF/PUSHFD - Push Flags onto Stack
    RCL - Rotate Through Carry Left
    RCR - Rotate Through Carry Right
    REP - Repeat String Operation
    REPE/REPZ - Repeat Equal / Repeat Zero
    REPNE/REPNZ - Repeat Not Equal / Repeat Not Zero
    RET/RETF - Return From Procedure
    ROL - Rotate Left
    ROR - Rotate Right
    SAHF - Store AH Register into FLAGS
    SAL/SHL - Shift Arithmetic Left / Shift Logical Left
    SAR - Shift Arithmetic Right
    SBB - Subtract with Borrow/Carry
    SCAS - Scan String (Byte, Word or Doubleword)
    SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+)
    SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+)
    SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+)
    SETE/SETZ - Set if Equal / Set if Zero (386+)
    SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+)
    SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+)
    SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+)
    SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)
    SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+)
    SETS - Set if Signed (386+)
    SETNS - Set if Not Signed (386+)
    SETC - Set if Carry (386+)
    SETNC - Set if Not Carry (386+)
    SETO - Set if Overflow (386+)
    SETNO - Set if Not Overflow (386+)
    SETP/SETPE - Set if Parity / Set if Parity Even (386+)
    SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+)
    SGDT - Store Global Descriptor Table (286+ privileged)
    SIDT - Store Interrupt Descriptor Table (286+ privileged)
    SHL - Shift Logical Left
    SHR - Shift Logical Right
    SHLD/SHRD - Double Precision Shift (386+)
    SLDT - Store Local Descriptor Table (286+ privileged)
    SMSW - Store Machine Status Word (286+ privileged)
    STC - Set Carry
    STD - Set Direction Flag
    STI - Set Interrupt Flag (Enable Interrupts)
    STOS - Store String (Byte, Word or Doubleword)
    STR - Store Task Register (286+ privileged)
    SUB - Subtract
    TEST - Test For Bit Pattern
    VERR - Verify Read (286+ protected)
    VERW - Verify Write (286+ protected)
    WAIT/FWAIT - Event Wait
    WBINVD - Write-Back and Invalidate Cache (486+)
    XCHG - Exchange
    XLAT/XLATB - Translate
    XOR - Exclusive OR

http://cse.unl.edu/~goddard/Courses/CSCE351/IntelArchitecture/InstructionSetSummary.pdf

30.1 New Intel Architecture Instructions The following sections give the Intel Architecture instructions that were new in the MMX Technology and in the Pentium Pro, Pentium, and Intel486 processors. 30.1.1 New Instructions Introduced with the MMX™ Technology The Intel MMX technology introduced a new set of instructions to the Intel Architecture, designed to enhance the performance of multimedia applications. These instructions are recognized by all Intel Architecture processors that implement the MMX technology. The MMX instructions are listed in “MMX™ Technology Instructions”. 30.1.2 New Instructions in the Pentium ® Pro Processor The following instructions are new in the Pentium Pro processor: • CMOV cc —Conditional move (see “Conditional Move Instructions”). • FCMOV cc —Floating-point conditional move on condition-code flags in EFLAGS register (see “Data Transfer Instructions”). • FCOMI/FCOMIP/FUCOMI/FUCOMIP—Floating?-point compare and set condition-code flags in EFLAGS register (see “Comparison and Classification Instructions”). • RDPMC—Read?