Bayle Shanks's website: proj-oot-lowEndTargets-lowEndTargetsUnsorted5

two ppl suggested NXP (Freescale) for chips for major projects:

https://news.ycombinator.com/item?id=24800037

one of them suggested NXP's i.MX line.

a review of one of the cheaper I.MXs (NXP i.MX 6ULL and NXP i.MX 6ULZ) is here (see also the relevant section in Discussion):

https://jaycarlson.net/embedded-linux/#imx6

the conclusions about this part in the Discussion section are pretty good. Combined with the other recommendations on HN, i might try this part first, if i wanted to learn a lot of electronics. From the HN comments, longevity list is here:

https://www.nxp.com/products/product-information/product-longevity:PRDCT_LONGEVITY_HM

The NXP i.MX 6ULL has 15-year production (from 2016 Q4) and NXP i.MX 6ULZ has 10 year (from 2018 Q4). So they're both usable in major projects. The 6ULL is about $10 and the 6ULZ is about $7 (although the reviewer found it for $3).

The ULZ has:

32 kB L1 I-Cache and 32 kB L1 D-Cache [1]
128 kB L2 cache
Cortex-A7 (32-bit ARMv7-A)
900 MHz

64k of these would cost about 65536*7 = ~$450k. Assembled, i'm very blindly guessing that that's probably around the $2mil range i was getting earlier.

But maybe a better tactic would be to multiplex a number of threads on each one.

If 256 threads per, then:

256 of these total for 64k threads
900/256 = ~3 MHz per thread
32k/256 = 128 bytes of L1 per thread
128k/256 = 512 bytes of L2 per thread

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"the ZX Spectrum had 16KB"

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https://www.sparkfun.com/news/3422

Sparkfun ALC:

"Select your controller. Today, we offer five controllers: Artemis, SAMD51, ATmega328, ATtiny84 and ESP32"

https://m5stack.com/ ESP32 based

"Typically I use Cortex-M4's and Cortex-M7's, in part because I can stick 16MB of DDR on them pretty easily and for the application space that is important. "

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https://interrupt.memfault.com/blog/the-best-and-worst-mcu-sdks

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M1 chip:

https://www.anandtech.com/show/16226/apple-silicon-m1-a14-deep-dive/2

192k icache, 128k dcache!!
>600 reorder buffer (ROB): usually more like around 256
8 wide decode; apparently only possible b/c fixed-width ARM64, not crazy variable-width x64

" What is an “Embedded System”?Definition of “embedded system” is arbitrary.What is meant here:•Small 16-bit or 32-bit CPU (e.g. ARM Cortex M0+)•RAM: 64 kB or less•ROM: 256 kB or less•Some network connectivity•No operating system (“bare metal”)•Strong constraints on size / power / thermal dissipation(CPU is feeble but this does not matter much.)

No memory management unit (MMU)•All RAM is accessible read/write (and exec in some architectures)•ROM (Flash) is all readable•No sandbox / isolation•No trapping of NULL pointer dereference•No ASLR•No? guard page for stack overflows•Recursive algorithms must be banned

No room for multiple or large stacks•Multiple concurrent processes must run•... but without locking the system•A typical C stack needs at least 1-2 kB, more realistically 4 kB•C tends to increase stack usage

" https://t1lang.github.io/NorthSec-20190516.pdf

" T0is a Forth-like language used to implement the handshake parser and the X.509 validation engine.•Compiled to threaded code•Uses two custom stacks (data & system stack) of limited size (128 bytes each)•Runs in a flat, small interpreter loop that can be stopped and restarted at will•Instructions are a single byte each (token threading)•Compiler is written in C# and performs some static analysis (maximum stack usage) "

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https://www.clockworkpi.com/

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list of rpi-type things on frontpage of:

https://elinux.org/Main_Page

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https://elinux.org/Main_Page

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foss smartwatch:

https://www.pine64.org/pinetime/

uses SOC:

Nordic Semiconductor nRF52832

    64 MHz + Floating Point

" Versatile Bluetooth 5.2 SoC? supporting Bluetooth Low Energy, Bluetooth mesh and NFC "

"64 MHz ARM Cortex-M4F CPU" [2]

2k icache [3] [4] (icache for the flash)

512/256 KB Flash + 64/32 KB RAM

(but the full pinephone has 4 MB of User Storage, 0.5 MB of OS Storage)

GPIO: 32 configurable (but a whole bunch of other peripherals)

"The ARM® Cortex®-M4 processor with floating-point unit (FPU) has a 32-bit instruction set (Thumb®-2 technology) that implements a superset of 16 and 32-bit instructions to maximize code density and performance.

This processor implements several features that enable energy-efficient arithmetic and high-performance signal processing including:

    Digital signal processing (DSP) instructions
    Single-cycle multiply and accumulate (MAC) instructions
    Hardware divide
    8 and 16-bit single instruction multiple data (SIMD) instructions
    Single-precision floating-point unit (FPU)

The ARM Cortex Microcontroller Software Interface Standard (CMSIS) hardware abstraction layer for the ARM Cortex processor series is implemented and available for the M4 CPU.

Real-time execution is highly deterministic in thread mode, to and from sleep modes, and when handling events at configurable priority levels via the Nested Vectored Interrupt Controller (NVIC)." [5]

37 interrupts (vectors in NVIC) [6]

nRF52832 price is about $3-$4

while searching for it i happened upon a lower-end thing in the same product line:

" The main differences between the nRF52810 and the nRF52832 are the following

    NFC peripheral has been removed on the nRF52810
    Flash reduced from 256kB to 192kB and RAM reduced from 32kB to 24kB.
    Number of SPI/TWI Master peripherals reduced from 3 to 2 ( 1 x SPI Master or Slave + 1 x TWI Master or Slave)
    Number of PWM channels reduced from 12 to 4.
    I2S Peripheral has been removed.
    Low Power Comparator has been removed
    Number of 32-bit 16MHz Timers reduced from 5 to 3
    Number of 32.768kHz RTCs reduced from 3 to 2.
    The number of GPIOTE channels reduced from 8 to 4.
    FPU (Floating Point Unit) removed.
    Cache removed"

nRF52810 price is about $2-$3

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looperhacks 6 hours ago [–]

Funny, I actually have an open Pinetime in front of me right now. I use it for my masters thesis and it's a really nice project. If you want to try out some embedded development (that you can actually show to friends who don't aren't developers), I think this is the perfect project.

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kken 5 hours ago [–]

Ok, just to make sure I understand this correctly.

This is basically a commercial smartwach (the Colmi P8) that is based on a well documented SOC, the nordic nRF52832
The open source version comes with an enclosure that is not glued shut, so that it is easy to access testpoints on the pcb.
Development is done by accessing the nRF51 SWD interface with pogo pins or similar. The programming interface can be a standard SWD interface such as an STLink clone

Ok, sounds easy enough. It should be possible to just buy one of those smartwatches and crack them open? But OTOH the developer version is not much more expensive.

The main question is now: What software to run on it, that goes beyond a few experiments? Is there any kind of open source smartwatch OS that would run on this?

Edit: Corrected typo, of course I meant SWD interface, not SWM. (SWM or rather SWIM is for STM8)

amar-laksh 3 hours ago [–]

There ya go: https://github.com/daniel-thompson/wasp-os

wongarsu 2 hours ago [–]

There is also https://github.com/endian-albin/pinetime-hypnos

and the default https://github.com/JF002/Pinetime

My guess would be that Wasp-OS will become the beginner-friendly fully-featured option while Pinetime will be the more battery friendly option.

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deadw3ight 48 minutes ago [–]

After reading what others have said and feedback on PineTime? and what a good hackable watch should have, it seems like Pebble should resurrect from the grave as a hackable watch. I mean the pebble time had 128kb ram (this only has 64k ram), an color epaper display, 150mAh battery (over a week battery life), heart rate sensors, etc. Heck its even being supported by the open source community AFTER it was discontinued.

Maybe Fitbit can be petitioned to make the Pebble's hardware fully open source too.

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I have a pinetime and the form factor is great (until I lost the back plate, next one will be sealed). All the opensource activity around the watch is also great. The biggest drawback to me is only 64k of ram. Thats a Commodore64's worth of ram. The 240x240 screen is 57kbytes, it must have its own display ram.

Also NordicSemi? never seemed to be particularly opensource friendly. I'm hoping for a future RISCV edition of this watch with more ram.

makomk 5 hours ago [–]

Apache have a fully open source Bluetooth LE stack for most of the Nordic Semi chips, in part because they actually documented their radio hardware unlike most other manufacturers.

plasticchris 2 hours ago [–]

I think the linux foundation has one in zephyr as well.

listic 5 hours ago [–]

Do you state that it has its own display RAM or doesn't it?

240x240 is ~56.25 kB at 8 bpp. the screen is RGB 65K colors, that is, 16 bpp; so the framebuffer size should be twice larger. I assume that the display controller has its own memory. True, you would need another 112,5 kB for double-buffering, but maybe you can do without it.

deadw3ight 2 hours ago [–]

Color displays are great, but they should have had an option for a (color or black and white) e-paper display. More efficient for these purposes imo.

lambda_obrien 1 hour ago [–]

I would pay so much for a hackable watch like this with a 3 or 4 color epaper display, I'd almost pay as much as an apple watch if it was high quality hardware and had a great open API and toolchain.

deadw3ight 52 minutes ago [–]

Go on ebay and purchase a Pebble Time. Color epaper display, fully hackable even after being discontinued thanks to the dev community who continues to update it with "Rebble" the open source version of the OS it ran on.

rch 1 hour ago [–]

I'd pay more than for mass produced consumer gear, from any manufacturer.

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deadw3ight 4 hours ago [–]

Yeah, the original Apple watch had like half a GB, and a raspberry pi zero ($5 price) has the same. Couldn't they have fit that within both budget and size?

leoedin 4 hours ago [–]

It's a microcontroller rather than an application chip - so the amount of RAM will always be significantly less. A really beefy high end microcontroller might have 1MB of internal RAM - and for most applications that's more than enough.

deadw3ight 4 hours ago [–]

Ohhhhh, I didn't realize that. Makes a lot more sense, I guess it is a better comparison to an Arduino than a raspberry pi.

rubenbe 3 hours ago [–]

Slapping on a more RAM on the PCB is not free energy-wise. The watch only has a 180mAh battery that needs to provide power for an entire week.

deadw3ight 2 hours ago [–]

I mentioned in another comment about how I had the Pebble watch (before Apple and Android watches were a thing) and it had 128 kb ram total, but it lasted 11 days. That thing was a beast, but as someone else mentioned cost is a. big consideration too. It had 150 mAh on the newer models, before it was discontinued, so while I'm sure it definitely eats up energy I think it's definitely possible to fit more RAM in the power constraints.

Granted that was an e-paper display. (They had color and black and white options)

mschuster91 4 hours ago [–]

> Couldn't they have fit that within both budget and size?

Oh they could have. The problem is: it's extremely hard to get access to powerful SoCs? - the vendors simply won't work with you and most of the documentation is under NDA.

deadw3ight 2 hours ago [–]

> it's extremely hard to get access to powerful SoCs?