Boot Extended (Oot BootX) reference

:hardbreaks: :toc: macro :toclevels: 0

Version: unreleased/in-progress/under development (0.0.0-0)

BootX? extends Boot with more instructions (for a total of about 60), as well as concurrency semantics. Many of the new instructions are functions that could be written as subroutines in Boot, but some of them are OS or VM services.

This documents extends the document boot_reference.adoc.

Instruction encoding

The instruction encoding is mixed-length.

Encodings are little-endian on disk, over the network, or when presented in serialized form, and are typically stored in host byte order in memory.

The least-significant bits of the instruction indicate the instruction's width in the following manner:

• If the least-significant bit is 0, the instruction is 16-bits
• If the least-significant two bits is 01, the instruction is 8-bits
• If the least-significant three bits are 011, the instruction is 32-bits
• If the least-significant three bits are 111, the instruction is encoded in some alternate extension encoding

The format and semantics of the 16-bit instructions are identical to Boot.

The encoding format of the 8-bit instructions is (from LSBit to MSBit):

• 2 format bits
• 6 opcode bits

Opcodes 0 thru 31 (inclusive) are available for implementation-dependent or user use. The last 32 opcodes (32 thru 63) assigned to the 8-bit instruction opcodes are RESERVED. Our intention is to wait until we have a number of BootX? programs to analyze, and then choose the 32 available 8-bit instruction opcodes to be 'shortcuts' for common sequences of one or more 16- or 32-bit instructions (dictionary compression).

The encoding format of the 32-bit instructions is (from LSBit to MSBit):

• 3 format bits
• 3 address mode bits for the opcode
• 5 operand_value bits for the opcode
• 3 address mode bits for the op2
• 4 operand_value bits for op2
• 3 address mode bits for the op1
• 4 operand_value bits for op1
• 3 address mode bits for the op0
• 4 operand_value bits for op0

(todo; maybe op0 should be least-significant, since in the instructions, its op0 which tends to be an input, so we want this to be loaded first)

The instruction 'ldi-i16' could be considered to have its own encoding format; 5 bits of the operands is used to determine an output target in a unique way.

When operands are used as 'subopcodes' using the INSTR- instructions, then the address mode bits and the operand_value bits are combined for the subopcode (so these subopcodes are 7 bits, not 5).

N-bit instructions must be N-bit aligned. Branch and Jump targets are in units of N-bits. So, for example, 8-bit instructions must be 8-bit aligned, 16-bit instructions must be 16-bit aligned, 16-bit instruction branch and jump targets count in units of 16-bits, 32-bit instruction branch and jump targets count in units of 32-bits.

Registers

Registers are as in Boot, except that in displacement or indexed addressing modes, a base register of 0 refers not to the zero register, but rather to the PC.

TODO: in BootX?